In a nutshell: Codenamed Milan-X, these new chips will characteristic the same capabilities and features as existing 3rd-gen Epyc processors, albeit with three times the amount of L3 cache. At the top tier, this works out to 768MB of L3 cache and upwardly to 804MB of total enshroud per socket.

AMD at Computex earlier this year teased side by side-gen 3D chiplet engineering science it developed in collaboration with Taiwan Semiconductor Manufacturing Company. During the company's virtual Accelerated Information Center Premiere issue on Monday, AMD announced it would be bringing this new technology to the data center.

When architecting Milan-10, AMD studied how technical computing applications behaved, and found that a large corporeality of enshroud was primal to obtaining higher performance. This keeps data closer to the cores, thus reducing overall system latency.

Su said Milan-X chips are the fastest server processors for technical calculating workloads, offering more than than a 50 pct uplift compared to standard Milan processors. What's more, they support Socket SP3, will exist driblet-in compatible with existing boards with a simple BIOS update, and take advantage of today'due south software with no changes required.

Third-gen AMD Epyc CPUs with 3D V-Cache are scheduled to launch in the beginning quarter of 2022. Cisco, Dell, Lenovo, HPE and Supermicro have already partnered with AMD and will exist offering server solutions utilizing these processors when the time comes.

(Benchmarks were taken with WRF v. 4.xv, OpenFOAM 5. 1912, and Ansys Fluent 2022 R1)

If y'all tin't wait that long, Microsoft Azure HPC has virtual machines featuring the new fries bachelor from today in private preview with a broader rollout slated for the coming weeks.

Share value in AMD is up more than 10 per centum on the mean solar day.